Technical Review Committee

  • Amit Nene, Texas Instruments
  • Ashish Mathur, Freescale
  • Saurabh Tiwari, Intel
  • Girish Verma, CircuitSutra
  • Anup Zade, Applied Micro
  • Prasanna Kesavan, Infineon

   Organizing Committee

  • Umesh Sisodia, CircuitSutra
  • Kamlesh Pathak, ST Micro
  • Rajiv Jain, ISA
  • Sri Chandra, IEEE
  • Aravinda Thimmapuram, Intel



A platform to discuss the SystemC based next generation methodologies for design and verification of Electronics Systems (Semiconductor Chips + Embedded Software)

Venue: Hotel Radisson, Noida, India
Tutorial Day: 14th April, 2013 (Sunday), Conference Day: 15th April, 2013 (Monday)

Click here for :  Presentations & Agenda, Venue Details


Silver Sponsors


 Bronze Sponsors



 Tutorials Sponsors


Media Partners



Accellera Global Sponsors



Keynote Speakers / Invited Talks


Atul Kwatra
Principal Engineer, Intel
Philipp A. Hartmann,
Sr. Researcher, OFFIS
Dennis Brophy,
Vice Chair, Accellera Systems Initiative
Mike Meredith
Vice Chair, Accellera Synthesis WG (Past President, OSCI)
Sri Chandra
Standards Sr. Manager, IEEE
Kevin Smart
Director R&D, System-Level Solutions, Synopsys
Bishnupriya Bhattacharya
R&D Architect, Cadence



Affiliated With

accellera     OCP          ISA